1. Field of the Invention
The invention relates generally to a method of manufacturing a flash memory device and, more particularly, to a method of forming an HDP oxide film of the same height as that of a floating gate between gate lines and then forming gate spacers using a nitride film.
2. Discussion of Related Art
In general, in flash memory devices, if a strong electric field is formed at the edges of the drain region, hot carriers are increased, degrading device characteristics. To prevent the problem, gate spacers made of an insulating material are formed on the sidewalls of the gate line. The gate spacers are used as ion implantation masks during the high-concentration ion implantation process for forming the source/drain region. For higher integration of 70 nm-grade devices, it is preferred that the gate spacers be removed after the high concentration ion implantation process.
FIGS. 1a and 1b are cross-sectional views illustrating a method of manufacturing a flash memory device in the related art.
Referring to FIG. 1a, a tunnel oxide film 11, a first polysilicon layer 12 for a floating gate, a dielectric layer 13 of an ONO structure, a second polysilicon layer 14 for a control gate, and a capping oxide film 15 are sequentially formed on a semiconductor substrate 10 in which an active region and an isolation region are divided by means of common processes.
The capping oxide film 15, the second polysilicon layer 14, the dielectric layer 13, the first polysilicon layer 12, and the tunnel oxide film 11 are sequentially etched by a photolithography process, forming a gate line 16 of a desired pattern. An ion implantation process is then performed to form an ion implantation region 17 that is self-aligned in the gate line 16.
Referring to FIG. 1b, a buffer oxide film 18 is formed on entire surface including the gate line 16. A nitride film 19 for preventing the semiconductor substrate 10 from etch damage in a subsequent etch-back process is then formed.
Thereafter, an oxide film 20 for forming spacers is formed on entire surface including the nitride film 19. An etch-back process is performed so that the oxide film 20 remains only sidewalls of the gate line 16, thereby forming the gate spacers 20.
If the gate spacers are formed using the oxide film as described above, the capacitance of word lines is reduced and a disturb characteristic of cells is improved accordingly. However, the etch-back process cannot be performed by a wet etch method. As a result, there are drawbacks in that the device size increases and the net die reduces since the gate spacers cannot be removed.
In contrast, if the spacers are formed using a nitride film, nitride film spacers remain between floating gate lines. Accordingly, the capacitance of floating gate increases and a disturb characteristic of cells is degraded.